IBM Condor

Overview

IBM Condor is the largest superconducting quantum chip IBM has built. It holds 1,121 transmon qubits, and when it was unveiled at the IBM Quantum Summit on December 4, 2023 it became the first quantum processor to pass 1,000 physical qubits. The number made headlines, but the more interesting story is why IBM treated Condor as a milestone rather than as the foundation of its next product line.

A quantum computer with many noisy qubits is not automatically more useful than one with fewer, better qubits. Condor's error rates are comparable to those of the 433-qubit Osprey, so the circuits it can run reliably are not deeper than before. IBM used it to answer a different question: can the industry build, wire, and cool a chip of this size at all?

History and background

IBM first named a 1,121-qubit processor in its 2020 hardware roadmap, a plan that also listed Eagle (127 qubits, 2021) and Osprey (433 qubits, 2022) as steps along the way. Each chip in that sequence roughly tripled the qubit count of the previous one, and each required new packaging and wiring techniques, because the number of control lines grows with the number of qubits.

Condor arrived on schedule in December 2023, alongside the 133-qubit Heron processor and the modular Quantum System Two. IBM presented the two chips as two halves of one strategy: Condor showed how far scale could be pushed, and Heron showed how good a smaller chip could be. From that point the company's public roadmap emphasized quality, error correction, and linking several chips together instead of building ever larger single chips.

How it works

Condor uses fixed-frequency transmon qubits: tiny circuits made from superconducting aluminum and niobium that behave like artificial atoms when cooled to about 15 millikelvin. Two-qubit gates use the cross-resonance technique, in which a microwave tone applied to one qubit at the frequency of its neighbor creates an entangling interaction. Fixed-frequency qubits are simple and have good coherence, but they cannot be tuned, which makes them more sensitive to unwanted interactions between neighbors than the tunable-coupler designs IBM adopted in Heron.

The hard part of Condor is not the qubits themselves but delivering control signals to them. IBM reports about 50% higher qubit density than Osprey, larger laminate packaging, and over a mile of high-density cryogenic flex wiring inside a single dilution refrigerator. Every qubit needs microwave control and readout lines, and each additional line adds heat and complexity inside a very cold, very small space. Solving that wiring problem was as important as fabricating the qubits.

The qubits sit in a lattice often described as heavy-hex, a honeycomb-like pattern in which each qubit couples to only two or three neighbors. Fewer neighbors means fewer pathways for crosstalk, at the cost of needing extra swap operations when an algorithm wants two distant qubits to interact.

Connectivity

Nearest-neighbor connections in a heavy-hex style lattice; each qubit connects to two or three neighbors

Specifications in detail

Key features

• 1,121 physical qubits, the first processor to exceed 1,000
• About 50% higher qubit density than the 433-qubit Osprey
• More than a mile of high-density cryogenic flex wiring inside a single dilution refrigerator
• Built to test fabrication yield, packaging, and cryogenic delivery at scale

Limitations

• Gate error rates are not better than those of the smaller Osprey, so the extra qubits do not translate into deeper circuits
• Not part of IBM's standard production cloud fleet, so outside researchers have had little hands-on access
• IBM itself moved its focus to smaller, higher-quality chips such as Heron and to modular designs

Timeline

What it is used for

• Testing fabrication yield and packaging methods for very large superconducting chips
• Studying how wiring density and cryogenic heat load limit single-chip scale
• Informing the design of modular, multi-chip systems rather than running production workloads

How it compares

• Compared with IBM Heron, Condor has about eight times as many qubits but a considerably higher error rate, so Heron can run deeper circuits reliably.
• Compared with Google Willow (105 qubits), Condor shows the opposite design philosophy: Willow prioritizes error-correction quality, Condor prioritizes physical scale.
• Compared with Osprey, Condor's improvement is density and wiring, not gate quality.

Technical notes

Condor is best read as an engineering milestone. IBM's roadmap, published in 2020, named a 1,121-qubit processor for 2023, and Condor delivered on that date. The lessons from it, about wiring density, yield, and cooling, fed into the modular strategy behind Heron, Flamingo, and the Starling roadmap rather than into a line of ever larger monolithic chips.

Why it matters

Condor settled a practical question: it is possible to fabricate and operate a chip with more than a thousand superconducting qubits. That is a necessary step toward machines with many thousands of qubits, even if the future version is built from several linked chips instead of one large one.

It is also a good lesson in reading qubit counts. A chip's usefulness depends on gate error, coherence, and connectivity as much as on how many qubits it contains, which is why IBM, Google, and Quantinuum have all moved toward quality-first roadmaps.

Frequently asked questions

Keep exploring

• Company profile: IBM
• Related processor: IBM Heron (r1, r2, and r3)
• Related processor: IBM Osprey
• Related processor: IBM Eagle
• Related processor: Google Willow

This profile is written for educational purposes and summarizes company announcements, published papers, and vendor specification sheets. Last reviewed: September 30, 2026. Figures marked as company-reported have not all been independently verified, and benchmarks differ between vendors, so compare them with care.

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